1. Field of the Invention
The present invention relates to a semiconductor device and a method for manufacturing the same. In particular, it relates to a semiconductor device, such as a memory device which is disadvantageously affected by a charge-up phenomenon during a diffusion process, and a method for manufacturing the same.
2. Description of Related Art
In nonvolatile memories involving local charge accumulation, charges injected as a result of a charge-up phenomenon during a diffusion process are often difficult to remove after the completion of the diffusion process. For this reason, greater importance has been placed on a technology for suppressing charge-up damage to a memory element during the diffusion process. As an example of a method for suppressing the charge-up damage, Publication of Japanese Patent Application No. 2001-57389 discloses a method for connecting a protective element to the memory element during the diffusion process.
FIG. 14 shows a conventional method for suppressing the charge-up damage. As shown in FIG. 14, a charge-up protection transistor 152 is connected to a protection target element 150 through a wiring line 140 in a wiring process. Accordingly, when a positive charge is applied to an electrode of the protection target element 150 in a process to be performed after the wiring process, a positive voltage is simultaneously applied to an electrode of the protection transistor 152. Then, the protection transistor 152 is brought into electrical conduction and the charge is not stored in the electrode of the protection target element 150 but transferred to a substrate 141. When a negative charge is applied to the protection target element 150, a source/drain diffusion layer and a well diffusion layer of the protection transistor 152 are forward-biased. As a result, the charge is not stored in the electrode of the protection target element 150 but transferred to the substrate 141.
According to the aforementioned conventional technique, however, the protection effect is achieved only after the wiring process. Therefore, the memory element cannot be protected from a charge-up phenomenon caused during a diffusion process on a Front End of Line (FEOL) level. Further, a negative bias cannot be applied to the protection target element after the diffusion process.
As the memory element becomes finer, the charge-up phenomenon during the diffusion process on the FEOL level has having nonegligible effect on variations of initial threshold value (Vt) of memory cells. Specifically, since low-temperature processes are required under the fine design rules, a heating process for withdrawing charges stored on the FEOL level cannot be performed. As a result, the charge-up damage is not suppressed to a sufficient degree by measures taken to protect the memory element in the processes after the wiring process.
When the thickness of an oxide-nitride-oxide film (ONO film) is reduced according to the finer design rules, an initial threshold value Vt is likely to be varied by charge injection. For example, when the thickness of the ONO film is reduced from 30 nm to 15 nm, the initial threshold value Vt may possibly vary due to the charge injection only as a result of applying a voltage of about 10 V for a long time during charging in the diffusion process on the FEOL level.